SVA Table¶
Note
Sampled value functions
(except for some global clocking future sampled value functions),
triggered, matched, and local variables
need to be handled outside of Property IR.
Some of these features might be added in later revisions.
Declarations¶
concept |
SVA keyword |
Property IR statement |
SV Standard |
|
|---|---|---|---|---|
declaring sequences |
|
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16.8 Declaring sequences (p. 402) |
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declaring properties |
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16.12 Declaring properties (p. 439) |
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recursive properties |
|
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16.12.17 Recursive properties (p. 459) |
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Assertions¶
concept |
SVA statement |
Property IR statement |
SV Standard |
|---|---|---|---|
assert |
|
|
16.14.1 Assert statement (p. 476) |
assume |
|
|
16.14.2 Assume statement (p. 477) |
cover |
|
|
16.14.3 Cover statement (p. 479) |
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restrict |
|
|
16.14.4 Restrict statement (p. 480) |
disable condition |
|
assertion statement parameter
|
16.12 Declaring properties (p. 441) 16.14.6.4 Disabling procedural concurrent assertions (p. 487) |
enabling condition |
|
assertion statement parameter
|
16.14.6 Embedding concurrent assertions in procedural code (p. 481) F.5.3.1 Neutral satisfaction (p. 1247) |
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vacuity |
assertion control system tasks
|
assertion statement parameter
|
16.14.8 Nonvacuous evaluations 20.11 Assertion control system tasks F.5.3.3 Vacuity |
output sequence matches |
|
Note
The enable condition depends on the specific location of the assertion in
procedural code. We gave two common examples.
The Property IR clock expression pir_clk_expr is obtained as described in
the table Clock Control below.
When embedding a concurrent assertion in procedural code, the inferred clock
needs to be set explicitly in the property using clk-prop-clocked,
regardless of whether an enabling condition is specified.
Clock Control¶
The Property IR primitives in this table have return type bool.
concept |
SVA operation |
Property IR primitive |
SV Standard |
|---|---|---|---|
global clock |
|
|
9.4.2 Event control (p. 232) 16.9.4 Global clocking past and future sampled value functions (p. 418) F.3.1 Clock control (p. 1235) F.3.4.4 Derived sampled value functions (p. 1240) |
rising edge |
|
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falling edge |
|
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any edge |
|
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changing clock ( |
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conditional clock |
|
|
9.4.2.3 Conditional event controls (p.235) |
clock disjunction |
|
|
9.4.2.1 Event OR operator (p. 232) |
Note
The corresponding Property IR clock expressions pir_clk_expr etc. in
conditional clock and clock disjunction need to use the correct
primitives necessary for the SVA clock expressions clk_expr etc.
For example, @(posedge clk iff bool) corresponds to (and (rising-gclk clk clk_def) bool).
Also take note of the details on the
global clocking future sampled value functions.
Boolean Operations¶
concept |
SVA operation |
Property IR primitive |
SV Standard |
|---|---|---|---|
logical not |
|
|
11.4.7 Logical operators (p. 280) |
logical and |
|
|
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logical or |
|
|
|
true |
|
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|
false |
|
|
|
logical equality |
|
|
11.4.5 Equality operators (p. 279) |
logical inequality |
|
|
|
true in initial cycle |
|
Sequence Operations¶
concept |
SVA operation |
Property IR primitive |
SV Standard |
|---|---|---|---|
sequence clock |
|
|
14. Clocking blocks (p. 354) 16.13.3 Clock flow (p. 468) 16.16 Clock resolution (p. 495) F.3.1 Clock control (p. 1235) |
delay |
|
|
16.7 Sequences (p. 399–401) |
concatenation |
|
|
|
fusion |
|
|
|
consecutive repetition |
|
|
16.9.2 Repetition in sequences (p. 410) |
goto repetition |
|
|
|
nonconsecutive repetition |
|
|
|
and |
|
|
16.9.5 AND operation (p. 421) |
intersection |
|
|
16.9.6 Intersection (AND with length restriction) (p. 423) |
or |
|
|
16.9.7 OR operation (p. 424) |
first match |
|
|
16.9.8 First_match operation (p. 427) |
throughout |
|
|
16.9.9 Conditions over sequences (p. 428) |
within |
|
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16.9.10 Sequence contained within another sequence (p. 430) |
sequence of length 1 |
|
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simple sequence to globally clocked sequence |
|
Property Operations¶
concept |
SVA operation |
Property IR primitive |
SV Standard |
||
|---|---|---|---|---|---|
property clock |
|
|
14. Clocking blocks (p. 354) 16.13.3 Clock flow (p. 468) 16.16 Clock resolution (p. 495) F.3.1 Clock control (p. 1235) |
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sequence properties |
|
|
16.12.2 Sequence property (p. 443) 16.12.15 Weak and strong operators (p. 458) |
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negation |
|
|
16.12.3 Negation property (p. 444) |
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disjunction |
|
|
16.12.4 Disjunction property (p. 444) |
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conjunction |
|
|
16.12.5 Conjunction property (p. 444) |
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if-else and case |
|
|
16.12.6 If-else property (p. 444) 16.12.16 Case (p. 458) |
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implication |
|
|
16.12.7 Implication (p. 445) |
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implies |
|
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16.12.9 Implies and iff properties (p. 449) |
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iff |
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followed-by |
|
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16.12.9 Followed-by property (p. 449) |
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nexttime |
|
|
16.12.10 Nexttime property (p.450) |
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always |
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16.12.11 Always property (p. 452) |
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until |
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16.12.12 Until property (p. 453) |
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eventually |
|
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16.12.13 Eventually property (p. 454) |
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abort properties |
|
|
16.12.14 Abort properties (p. 465) |
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simple property to globally clocked property |
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