=========================================== fst2tb - generate testbench out of fst file =========================================== .. raw:: latex \begin{comment} .. cmd:def:: fst2tb :title: generate testbench out of fst file .. code:: yoscrypt fst2tb [options] [top-level] :: This command generates testbench for the circuit using the given top-level module and simulus signal from FST file .. code:: yoscrypt -tb :: generated testbench name. files .v and .txt are created as result. .. code:: yoscrypt -r :: read simulation FST file .. code:: yoscrypt -clock :: name of top-level clock input .. code:: yoscrypt -clockn :: name of top-level clock input (inverse polarity) .. code:: yoscrypt -scope :: scope of simulation top model .. code:: yoscrypt -start