bufnorm - (experimental) convert design into buffered-normalized form

yosys> help bufnorm

bufnorm [options] [selection]

Insert buffer cells into the design as needed, to make sure that each wire
has exactly one driving cell port, and aliasing wires are buffered using
buffer cells, than can be chained in a canonical order.

Running 'bufnorm' on the whole design enters 'buffered-normalized mode'.

-buf

Create $buf cells for all buffers. The default is to use $_BUF_ cells
for sigle-bit buffers and $buf cells only for multi-bit buffers.

-chain

Chain all alias wires. By default only wires with positive-valued
'chain' or 'keep' attribute on them are chained.

-output

Enable chaining of ouput ports wires.

-public

Enable chaining of wires wth public names.

-nochain

Disable chaining of wires with 'chain' attribute.

-nokeep

Disable chaining of wires with 'keep' attribute.

-flat

Alias for -nokeep and -nochain.

-nosticky

Disable 'sticky' behavior of output ports already driving whole
wires, and always enforce canonical sort order instead.

-alphasort

Strictly use alphanumeric sort for chain-order. (Default is
to chain 'keep' wires first, then ports in declaration order,
and then the other wires in alphanumeric sort order.)

Run 'bufnorm' with -pos, -bits, or -conn on the whole design to remove all
$buf buffer cells and exit 'buffered-normalized mode' again.

-pos

Create (multi- and single-bit) $pos cells instead $buf and $_BUF_.

-bits

Create arrays of $_BUF_ cells instead of multi-bit $buf cells.

-conn

Create 'direct connections' instead of buffer cells.

-nomode

Do not automatically enter or leave 'buffered-normalized mode'.

The 'bufnorm' command can also be used to just switch in and out of
'buffered-normalized mode' and run the low-level re-normalizer.

-update

Enter 'buffered-normalized mode' and (re-)normalize.

-reset

Leave 'buffered-normalized mode' without changing the netlist.

WARNING: THE 'bufnorm' COMMAND IS EXPERIMENTAL.