portarcs - derive port arcs for propagation delay

yosys> help portarcs

portarcs [options] [selection]

This command characterizes the combinational content of selected modules and
derives timing arcs going from module inputs to module outputs representing the
propagation delay of the module.

-draw

plot the computed delay table to the terminal

-icells

assign unit delay to gates from the internal Yosys cell library

-write

write the computed arcs back into the module as $specify2 instances