verilog_defines - define and undefine verilog defines#

yosys> help verilog_defines#
verilog_defines [options]
Define and undefine verilog preprocessor macros.
-Dname[=definition]
define the preprocessor symbol 'name' and set its optional value
'definition'
-Uname[=definition]
undefine the preprocessor symbol 'name'
-reset
clear list of defined preprocessor symbols
-list
list currently defined preprocessor symbols