Other gate-level cells

Other gate-level cells

yosys> help $_TBUF_

A tri-state buffer.

Truth table:    A E | Y
               -----+---
                a 1 | a
                - 0 | z

Properties:

is_evaluable

Simulation model (verilog)

Listing 363 simcells.v

module \$_TBUF_ (A, E, Y);
    input A, E;
    output Y;
    assign Y = E ? A : 1'bz;
endmodule